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dc.contributor.authorJudith, Simon-
dc.date.accessioned2023-12-21T12:35:23Z-
dc.date.available2023-12-21T12:35:23Z-
dc.date.issued2020-
dc.identifier.otherOER000002880vi
dc.identifier.urihttp://dlib.hust.edu.vn/handle/HUST/23744-
dc.description.abstractRecently, amid growing awareness that computer algorithms are not neutral tools but can cause harm by reproducing and amplifying bias, attempts to detect and prevent such biases have intensified. An approach that has received considerable attention in this regard is the Value Sensitive Design (VSD) methodology, which aims to contribute to both the critical analysis of (dis)values in existing technologies and the construction of novel technologies that account for specific desired values. This article provides a brief overview of the key features of the Value Sensitive Design approach, examines its contributions to understanding and addressing issues around bias in computer systems, outlines the current debates on algorithmic bias and fairness in machine learning, and discusses how such debates could profit from VSD-derived insights and recommendations. Relating these debates on values in design and algorithmic bias to research on cognitive biases, we conclude by stressing our collective duty to not only detect and counter biases in software systems, but to also address and remedy their societal origins.vi
dc.description.urihttps://www.econstor.eu/handle/10419/233110/vi
dc.formatPDFvi
dc.language.isoenvi
dc.publisherEconStorvi
dc.rightsAttribution-NonCommercial-NoDerivs 3.0 Vietnam*
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/3.0/vn/*
dc.subjectthuật toánvi
dc.subjectphương phápvi
dc.subjectĐộ lệch thuật toánvi
dc.subjectThiết kếvi
dc.subject.lccQA9.58vi
dc.titleAlgorithmic bias and the Value Sensitive Design approachvi
dc.typeJournal articlevi
dc.description.noteCC BY 4.0vi
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